![](https://www.nscore.com/wp-content/uploads/2024/02/twinbit-gen2_img_01-600x400.jpg)
Overview
NSCore’s TwinBit™ Gen-2 supports 40nm to 22nm process nodes and beyond. As well as the Gen-1, TwinBit™ Gen-2 does not require any additional masks or process steps. Utilizing newly developed “Pch Schottky Non-Volatile Memory Cell”, it achieves ultra-low-power operations.
Pch Schottky NVM Cell
![Image](https://www.nscore.com/wp-content/themes/nscore2024/images/twinbit-gen2_img_02.png)
T-CAD Simulation
for Program / Erase
Hot carrier injection can be controlled by cell bias
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Hot-Hole Generation Distribution in Program
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Hot-Electron Generation Distribution in Erase