NSCore’s TwinBit™ Gen-1 is an embedded, true logic-based non-volatile memory solution for 180nm to 55nm process nodes with an extremely high endurance performance of >10K (PROGRAM) cycles. TwinBit can be implemented seamlessly in CMOS logic processes, with particular ease in advanced nodes, and without additional masks or process steps. The TwinBit series covers a memory size range of 64- to 512K-bits, making it suitable for analog trimming, security key storage and system switch of ASIC/ASSP.
Applications
IoT device
MCU
FPGA
ASIC with embedded NOR FLASH
ASSP with field re-writable firmware
Products with field re-writable security code
Products with field re-writable trimming code
Benefits
High density and Small area
No additional mask required
Automotive grade under AEC-Q100
Low-voltage and low-power operations
Built-in test circuit supports stress-free test environments
Technology Comparison
TwinBit
eFLASH
1Poly EEPROM
Bit Area
1
1
40
Retention
10 Year
10 Year
10 Year
P/E
100K Cycle
10K Cycle
100K Cycle
Add. Mask
None
+10 Mask
None
Add. Process None
None
Stacked Poly
None
Read Cycle
50MHz
50MHz
30MHz
Operational Temp.
150ºC
150ºC
85-150ºC
Storage
150ºC
150ºC
85-150ºC
Program Voltage
5.5V
10V
20V
Read
Byte
Byte
Byte
Program
Byte/Page
Byte
Byte
Erase
Sector
Sector
Byte
TwinBit
eFLASH
Campatibility with Standard IPs
Compatible
Not Compatible
Development TAT
Short
Very Long
Manufacuring Cost
Low (+0%)
High (+30-50%)
Leading Edge Process
Available
Not Available
Product Brief for Automotive-Grade TwinBit™ for TSMC0.18um Process
